高等学校化学学报 ›› 2021, Vol. 42 ›› Issue (6): 1672.doi: 10.7503/cjcu20200902
林城策, 彭博宇, 李寒莹
收稿日期:
2020-12-29
出版日期:
2021-06-10
发布日期:
2021-06-08
基金资助:
LIN Chengce, PENG Boyu, LI Hanying
Received:
2020-12-29
Online:
2021-06-10
Published:
2021-06-08
About author:
The authors contributed to this work equally.|The authors contributed to this work equally.
摘要:
与传统硅基集成电路相比, 有机集成电路具有成本低、 柔性及易携带等优势. 有机单晶集成电路在有机集成电路的基础上提高了材料的有序度和迁移率, 从而大大提升了电学性能, 具有丰富的研究价值和广泛的应用前景. 本文综合评述了有机单晶电路的研究进展, 重点总结了利用有机单晶制备逻辑门电路的相关工作, 并介绍了将有机单晶用于集成电路上的尝试, 最后分析了有机单晶集成电路研究中面临的挑战并对其未来的发展进行了展望.
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林城策, 彭博宇, 李寒莹. 有机单晶电路的研究进展. 高等学校化学学报, 2021, 42(6): 1672.
LIN Chengce, PENG Boyu, LI Hanying. Recent Progress in Organic Single Crystal Integrated Circuits. Chem. J. Chinese Universities, 2021, 42(6): 1672.
Fig.1 Structure of complementary inverter(A), transfer characteristic(black) and gain characteristic(red) of complementary inverter(B)S1: source electrode of n?channel FET; D1: drain electrode of n?channel FET; S2: source electrode of p?channel FET; D2: drain electrode of p?channel FET.
Fig.2 Gate structures and the truth tables of NOR(A), NAND(B), OR(C), and AND(D)VDD: Power source; GND: ground; A: input A; B: input B; Y: output; yellow parts: top electrodes; white parts: bottom electrodes; purple parts: p-channel semiconductor; blue parts: n-channel semiconductor.
Fig.3 3D optical microscopy image(A), magnified optical image of an inverter(B), static voltage transfer characteristics and the corresponding signal gain of the inverter operated at VDD=-20 V(C), static voltage transfer characteristics at VDD=-20 V for NAND gate(D) and NOR gate(G), dynamic switching characteristics at VDD=-20 V for NAND gate(E) and NOR gate(H), logic truth tables for NAND gate(F) and NOR gate(I)[34]Insets of (D) and (G): the corresponding circuit diagrams. Copyright 2015, Wiley?VCH.
Fig.4 Schematic diagrams(A) and SEM image(B) of organic single crystal circuits assembled by using nanowires of CuPc, F16CuPc, and SnO2:Sb as building blocks, static voltage transfer characteristics and gain of an inverter at VDD=20 V(C), circuit schematic diagrams of NOR(D) and NAND(G) logic gates, transfer(E) and dynamic switching(F) characteristics of a NOR gate at VDD=10 V, transfer(H) and dynamic switching(I) characteristics of a NAND gate at VDD=10 V[39]Copyright 2009, Wiley?VCH.
Fig.5 Schematic illustration of the inkjet?NTP process(A), schematic illustration of an ink droplet filling the recessed nanochannels of a selected area of the mold through capillary?driven flow(B), schematic illustration of a liquid bridge formed by a polar liquid layer between the nanowires and a substrate(C), a photographic image of the integrated electronic devices composed of FET, inverter, and p?n diode arrays made of single?crystal organic nanowires(D), static voltage transfer characteristics and signal gain of a representative inverter composed of TIPS?PEN and C60 FETs(E)[41]Copyright 2016, Wiley?VCH.
Fig.6 Schematic illustration of the DPC method and inverter fabricating process(A), a composite image from several optical microscopy(OM) images, showing the positioned regions of well?aligned C60 and TIPS?PEN crystals(B), the channels of the inverter(C), the static voltage transfer characteristics(D) and the corresponding gain of a inverter(E)[47]Inset of (D): the inverter circuit configuration. Copyright 2012, Wiley?VCH.
Fig.7 Schematic illustration of a monolithic complementary inverter using a rubrene single crystal(A), optical view of the typical device(B), voltage transfer characteristics of the inverter with applying a back gate voltage of +10 V(left), and corresponding DC values of inverter switching(right)(C), penetration current between the VDD and GND terminals at the switching(D)[48]Copyright 2010, Wiley?VCH.
Fig.8 An OM image of the bilayer TIPS?TAP and TIPS?BP crystals, showing the bilayer structure with wide ribbons crystals(yellow) and narrow ones(blue)(A), an AFM image of bilayer structure showing the top layer as wide crystals and the bottom layers as narrow crystals(B), the voltage transfer characteristics(C) and corresponding gain of an inverter(D)[54]Inset of (C): the inverter configuration. Copyright 2019, American Chemical Society.
Fig.10 A diagram showing the present crystal growth method(A), photographic images of organic single crystalline films of p?type(B) and n?type(C) semiconductors, a schematic of the RFID prototype(left) and a circuit diagram of the 4?bit selector(right)(D) and the signal received at the reader oscilloscope at two different temperatures(E)(E) The top and middle signals show the output when the temperature is above and below 50 °C, respectively. The bottom signals represent the CLOCK[64]. Copyright 2017, Wiley?VCH.
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